AI Coding Live News

Google Cloud Open-Sources TorchTPU: Native PyTorch on Google TPU Hardware with Day-Zero vLLM and SGLang Support

Google Cloud officially open-sourced TorchTPU, enabling native, zero-compilation-barrier PyTorch execution directly on Google Cloud TPU hardware (TPU v5p and TPU v6e). Overcoming the legacy friction of PyTorch/XLA's rigid graph compilation and dynamic-shape stalls, TorchTPU supports native PyTorch eager execution and custom Triton/C++ kernels. Leading high-throughput serving engines vLLM and SGLang announced immediate Day-0 support. Concurrently, Google Cloud introduced OpenAI models and Codex into its Vertex Model Garden, becoming the first hyperscaler to offer all three top frontier closed models.

Google Cloud Open-Sources TorchTPU: Native PyTorch on Google TPU Hardware with Day-Zero vLLM and SGLang Support

Key Takeaways

  • Google Cloud open-sources TorchTPU, delivering native, compilation-free PyTorch execution on TPU v5p and TPU v6e hardware
  • Eliminates PyTorch/XLA graph-compilation overhead, natively supporting PyTorch eager mode and custom Triton/C++ kernels
  • vLLM and SGLang announce immediate Day-0 TorchTPU releases, unlocking substantial throughput boosts on TPU infrastructure
  • OpenAI frontier models and Codex join Google Cloud's Model Garden, solidifying Google Cloud as the premier multi-model hyperscaler
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Google and Meta open-source TorchTPU: native PyTorch on TPUs, where porting is as simple as .to("cuda") to .to("tpu"), with native TPU backends for vLLM and SGLang

At PyTorch Conference 2026 on Oct 20, Google open-sourced TorchTPU on GitHub, co-developed with Meta's PyTorch team, making TPUs a native PyTorch device alongside GPUs and CPUs: eager mode and torch.compile, about 450 ATen ops, and torch.distributed collectives. Google also released vLLM-TorchTPU and SGLang-TorchTPU engines, integrations with TorchTitan, Ray, VeRL and Hugging Face Transformers v5 (device_map="tpu"), and a preview TPU agent suite for coding assistants such as Claude Code and Antigravity. AWS shipped the comparable TorchNeuron a day earlier.

Google and Meta open-source TorchTPU: native PyTorch on TPUs, where porting is as simple as .to("cuda") to .to("tpu"), with native TPU backends for vLLM and SGLang

Key Takeaways

  • Porting (official PyTorch blog): existing code runs by changing model.to("cuda") to model.to("tpu") and the distributed backend to tpu_dist; the team notes peak TPU performance still needs TPU-aware shapes and sharding
  • Coverage (vendor-reported): 98% of about 4,917 popular Hugging Face models (4,821) run without crashing, and 97% of 657 architecture representatives (638) match GPU numerics
  • Training scale (vendor-reported): Qwen3 MoE 235B on TorchTitan scales from 1,024 to 8,192 TPU v7 chips with MFU roughly flat at 27-29%; on 64 TPU v7 chips it reaches 1,828 TPS versus 1,937 TPS for JAX/MaxText
  • Inference cost (Google citing SemiAnalysis InferenceX): TPU v7 with vLLM-TorchTPU hits 2.01 cents per million tokens on 8K/1K, down from 3.6 cents at its September debut
  • Four repos open-sourced: torch_tpu, vllm-torchtpu, sglang-torchtpu and a TPU TorchTitan; the TPU agent suite is in preview for TPU v6e and TPU7x
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llm-d 1.0 ships: the Kubernetes-native open-source distributed inference stack led by Red Hat, IBM and Google hits production readiness, with vendors reporting 3,000 self-hosted coding agents at 5-10x lower cost than commercial APIs

At PyTorch Conference North America on Oct 20, the CNCF Sandbox project llm-d released version 1.0. It turns inference engines such as vLLM and SGLang into one coordinated serving pool, and 1.0 adds multi-tenant priority and fairness scheduling (flow control), router high availability with zero-downtime rolling upgrades (DisaggregatedSet), a v1 configuration API, and agent-aware session routing with Responses API state. Founded in 2025 by Red Hat, IBM, Google Cloud, CoreWeave and NVIDIA, the project has 500+ contributors, and JetBrains, DigitalOcean and Mistral already run it in production.

llm-d 1.0 ships: the Kubernetes-native open-source distributed inference stack led by Red Hat, IBM and Google hits production readiness, with vendors reporting 3,000 self-hosted coding agents at 5-10x lower cost than commercial APIs

Key Takeaways

  • Scale (Red Hat press release, vendor-reported): GLM 5.2, roughly 753B parameters, on NVIDIA GPUs peaked at 6.6M output tokens per minute and served up to 3,000 concurrent coding agents with zero preemptions, 5-10x cheaper per token than equivalent commercial API pricing at cloud rental rates
  • Cache reuse: IBM says the prefix-aware router captured 97% of available cache reuse on an agentic coding workload; an IBM Research quantum error correction project saw ~98% prefix hits, ~$0.11 per million tokens, and 11.5x lower cost than an all-proprietary setup
  • Google Cloud figures: on Ironwood TPU, prefix-aware routing plus host memory offload cut median time-to-first-token by more than 85% and raised throughput 2.4x on an agentic coding workload; the Gemini platform doubled its prefix cache hit rate from 35% to 70%
  • New in 1.0: flow-control multi-tenant QoS, router hot-standby HA, DisaggregatedSet for coordinated prefill/decode rollouts, a v1 config API, and previous_response_id support in the Responses API
  • Ecosystem: 500+ contributors from 25+ organizations; JetBrains' free Junie Lite, DigitalOcean Serverless Inference and Mistral's tiered commercial traffic run on it; the GitHub v1.0.0 notes admit not every tracked goal shipped
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AWS announces TorchNeuron: PyTorch runs natively on Trainium, open-sourcing under Apache 2.0 on October 20

On October 19 Amazon announced TorchNeuron, which uses PyTorch's standard PrivateUse1 device-backend mechanism to register Trainium as a native "neuron" device, with eager mode, torch.compile and native distributed APIs such as FSDP, DTensor and DDP on Trn2 and Trn3. Amazon says existing PyTorch code runs with a single device configuration change, and it will be open-sourced under Apache 2.0 at PyTorch Conference North America on October 20. The official docs still list it as a closed beta for now.

AWS announces TorchNeuron: PyTorch runs natively on Trainium, open-sourcing under Apache 2.0 on October 20

Key Takeaways

  • Open-source release: October 20 at PyTorch Conference North America, Apache 2.0 license (per Amazon).
  • Hardware: Trainium2 and Trainium3; registers as the neuron device via PrivateUse1, with eager mode and torch.compile(backend="neuron").
  • Migration: Amazon markets it as one configuration change with no rewrite; the docs list .to("cuda") to .to("neuron") as the minimum, and tensor parallelism also needs sharding set by NeuronCore count.
  • PyTorch 2.9 is the last PyTorch/XLA-based release; from PyTorch 2.10 Neuron moves to TorchNeuron, so older scripts need updates.
  • Quality and ecosystem: Amazon says every build is tested against hundreds of thousands of models, TorchTitan is integrated and Hugging Face tools support Trainium natively; no performance benchmarks were published.
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SGLang v0.5.22 Released: DeepSeek-V4.1 Throughput Jumps 2.3x on H200 and 1.9x on MI355X, InstantTensor Loads Models 10x Faster

The SGLang team released v0.5.22 featuring 950 PRs from 245 contributors: DeepSeek-V4.1 delivers up to 2.3x more throughput per GPU on NVIDIA H200 and 1.9x on AMD MI350X/MI355X via DSpark. The new InstantTensor loader cuts model loading time by 10x. B200 decodes Qwen3.8-Flash-Next 12% faster, while B300 speeds up GLM-5.3-Flash by 10% and yields 1.85x decode throughput for MiMo-V2.6-Pro. SGLang also adds native Apple Silicon PyTorch support and ComfyUI integration.

SGLang v0.5.22 Released: DeepSeek-V4.1 Throughput Jumps 2.3x on H200 and 1.9x on MI355X, InstantTensor Loads Models 10x Faster

Key Takeaways

  • SGLang v0.5.22 released with 950 PRs from 245 contributors across heterogeneous platforms
  • DeepSeek-V4.1 achieves up to 2.3x throughput per GPU on NVIDIA H200 and 1.9x on AMD MI350X/MI355X via DSpark
  • New InstantTensor loader speeds up large model checkpoint ingestion by 10x
  • Qwen3.8-Flash-Next decodes 12% faster on B200; MiMo-V2.6-Pro reaches 1.85x decode throughput on B300
  • PD disaggregation cuts p95 TTFT in half (-50%) on long prompts, alongside native Apple Silicon and ComfyUI diffusion support
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Resolving Training-Inference Mismatch in LLM RLVR: Calibrated Importance Sampling Eliminates Gradient Variance

In reinforcement learning with verifiable rewards (RLVR), rollout trajectories are generated by high-throughput inference engines while backward gradients are computed by training engines, introducing subtle floating-point probability discrepancies that trigger unbounded variance under exact importance sampling. Researchers identified the invariance of logit displacement distributions and introduced Calibrated Importance Sampling (CIS), featuring confidence-aware truncation that replaces unbounded second moments with constant bounds, establishing top scores across five mathematical benchmarks.

Resolving Training-Inference Mismatch in LLM RLVR: Calibrated Importance Sampling Eliminates Gradient Variance

Key Takeaways

  • Exposing Engine Probability Discrepancies: Fast inference engines (vLLM) and training backends (Megatron) assign diverging probabilities to identical tokens due to kernel optimizations, inducing severe variance under standard importance sampling.
  • Logit-Displacement Invariance: Formulates that per-logit perturbations before softmax remain approximately invariant to token confidence, enabling a principled confidence-aware importance weight cap.
  • Theoretical Variance Bounds & Benchmark Leadership: Replaces unbounded second moments with strict constant bounds, outperforming existing baselines across three MoE backbones on five rigorous mathematical reasoning benchmarks.
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LMDeploy 0.18.0: Qwen3.5 dflash, SM90 quantized GEMMs, Ascend GLM-5.2; TurboMind W4A16 + piecewise CUDA Graph

Shanghai AI Lab’s LMDeploy shipped v0.18.0 on 2026-09-28: input logprobs, expanded SM90 quantized GEMMs with unified TurboMind linear paths, Ascend GLM-5.2, Qwen3.5 dflash, and MoE shared-expert/FFN sharding. PyTorch path prototypes TurboMind W4A16 (AWQ), piecewise CUDA Graph prefill, XTuner TileLang sparse MLA, checkpoint-engine weight updates, and request-only KV cache metrics.

LMDeploy 0.18.0: Qwen3.5 dflash, SM90 quantized GEMMs, Ascend GLM-5.2; TurboMind W4A16 + piecewise CUDA Graph

Key Takeaways

  • Shipped v0.18.0 — Qwen3.5 dflash, Ascend GLM-5.2, SM90 quantized GEMMs
  • TurboMind W4A16 AWQ prototype + piecewise CUDA Graph prefill + TileLang sparse MLA
  • checkpoint-engine weight updates + request-only KV cache metrics + input logprobs
  • Upgrade: pip install -U "lmdeploy>=0.18.0"
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Unsloth Ships v0.1.815 & Prebuilt CUDA 13 Wheels: Run Qwen-Image-2.1 Locally with Claude-Compatible Agent Skills

Unsloth AI released version v0.1.815-beta alongside official prebuilt Linux x86_64 CUDA 13 wheels for Flash-Attention 2.8.4, Causal-Conv1D 1.7.0, and Mamba-SSM 2.3.2.post1 targeting PyTorch 2.13/2.14 on Python 3.13. The release enables fast local deployment of Alibaba's Qwen-Image-2.1 across both consumer and datacenter GPUs using Fast FP8 and GGUF quantization (defaulting to Q4_K_M) for combined image generation and precise image editing. Crucially, the Unsloth workspace introduces custom Agent Skills compatible with Claude Code and .agents formats, featuring @skill tagging in chat and 2x faster reasoning blocks (boosting UI rendering from 30 FPS to 60 FPS).

Unsloth Ships v0.1.815 & Prebuilt CUDA 13 Wheels: Run Qwen-Image-2.1 Locally with Claude-Compatible Agent Skills

Key Takeaways

  • Official CUDA 13 prebuilt wheels: instant binaries for Flash-Attention 2.8.4 and Mamba-SSM on PyTorch 2.13/2.14, eliminating compilation errors
  • Local Qwen-Image-2.1 execution: Fast FP8 and GGUF Q4_K_M support for both high-fidelity image generation and interactive image editing
  • Claude Code skill interoperability: native support for importing and executing custom skills from .agents and Claude Code folders with @skill
  • 60 FPS reasoning blocks: doubled chain-of-thought rendering performance from 30 FPS to 60 FPS with reworked UX
  • Expanded platform support: in-app Debian upgrades and a dedicated installer for Ubuntu 24.04+ on ARM64 architectures
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Google Cloud and Inferact partner to make TPU first-class in vLLM with open-source serving work

Inferact (@inferact) announced a Google Cloud partnership to make TPU first-class in vLLM: one engineering roadmap for production serving/kernels, a native PyTorch path via TorchTPU, and day-0 frontier-model support, plus a community program with shared TPU capacity and maintainer review — all open source.

Key Takeaways

  • Google Cloud and Inferact are making TPU first-class in vLLM.
  • Roadmap covers production serving/kernels, TorchTPU, and day-0 frontier models.
  • Community shared TPU capacity; all collaboration work is open source.
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